Espressif Systems /ESP32-C6 /EXTMEM /L1_CACHE_DATA_MEM_POWER_CTRL

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Interpret as L1_CACHE_DATA_MEM_POWER_CTRL

Description

Cache data memory power control register

Fields

L1_ICACHE0_DATA_MEM_FORCE_ON	The bit is used to close clock gating of L1-ICache0 data memory. 1: close gating, 0: open clock gating.
L1_ICACHE0_DATA_MEM_FORCE_PD	The bit is used to power L1-ICache0 data memory down. 0: follow rtc_lslp, 1: power down
L1_ICACHE0_DATA_MEM_FORCE_PU	The bit is used to power L1-ICache0 data memory up. 0: follow rtc_lslp, 1: power up
L1_ICACHE1_DATA_MEM_FORCE_ON	The bit is used to close clock gating of L1-ICache1 data memory. 1: close gating, 0: open clock gating.
L1_ICACHE1_DATA_MEM_FORCE_PD	The bit is used to power L1-ICache1 data memory down. 0: follow rtc_lslp, 1: power down
L1_ICACHE1_DATA_MEM_FORCE_PU	The bit is used to power L1-ICache1 data memory up. 0: follow rtc_lslp, 1: power up
L1_ICACHE2_DATA_MEM_FORCE_ON	Reserved
L1_ICACHE2_DATA_MEM_FORCE_PD	Reserved
L1_ICACHE2_DATA_MEM_FORCE_PU	Reserved
L1_ICACHE3_DATA_MEM_FORCE_ON	Reserved
L1_ICACHE3_DATA_MEM_FORCE_PD	Reserved
L1_ICACHE3_DATA_MEM_FORCE_PU	Reserved
L1_CACHE_DATA_MEM_FORCE_ON	The bit is used to close clock gating of L1-Cache data memory. 1: close gating, 0: open clock gating.
L1_CACHE_DATA_MEM_FORCE_PD	The bit is used to power L1-Cache data memory down. 0: follow rtc_lslp, 1: power down
L1_CACHE_DATA_MEM_FORCE_PU	The bit is used to power L1-Cache data memory up. 0: follow rtc_lslp, 1: power up

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